1. Field of the Invention
The present invention relates generally to a semiconductor technique and more particularly to a silicone-containing dielectric film having good filling or padding property for an interconnect structure of a semiconductor substrate.
2. Description of the Related Art
In the plasma chemical vapor deposition method (plasma CVD method), deposition of a film on semiconductor substrates is conducted by placing each semiconductor substrate, being a processing target, on a resistance-heating type heater preheated to 0 to 350° C. in an atmosphere of 1 to 10 Torr. This heater is placed in a manner facing a shower plate that releases reactant gas, and high-frequency power of 13.56 MHz to 60 MHz, etc., is applied by 100 to 4,000 W to the shower plate to cause high-frequency discharge between the heater and shower plate and thereby generate plasma. The plasma CVD method is used to deposit various types of thin film, such as an interconnect insulation film, passivation film, and anti-reflection film. Since achieving a disproportionately high level of surface diffusion is difficult with parallel-plate type plasma CVD, high-density plasma CVD that uses microwaves has traditionally been used to form an oxide film, etc., having filling characteristics. These techniques have been used since the days of 250-nm device nodes. One feature of such apparatus is that it not only forms a film, but also performs etching of a film, which means that the apparatus can support smaller hole diameters. With current products having device nodes of 65 nm to 90 nm, the mainstream processing method is one that combines film formation and etch-back. Representative processes in which this method is used include STI (Shallow Trench Isolation), and upper-layer processing in the wiring process.
However, combination of film formation and etch-back will not likely support smaller device nodes of 60 nm and below, and there is a need for an insulation film offering sufficient filling characteristics in line with the accelerating trend for super-fine circuitry.
Methods are known whereby a reactant having fluidity is formed on a silicon substrate using a low-temperature susceptor (such as a liquid-layer forming technology called the flow-fill process or flowable process). Many of these methods use siloxane reaction and mixing of SiH4 with O3 or other substance offering strong oxidizing power. However, an oxide film embedded by any such method presents the problems of the film becoming sparse in the embedded area and peeling off or breaking due to change in stress. One key reason that explains these problems is the production of water by the hydrogen groups and oxygen groups contained in the material, which can significantly increase the contraction coefficient of the annealed film. Also, water production in the film forming process creates voids when water is subsequently removed in the annealing of the formed film, which also increase the tendency of the film becoming sparse.
If the reactant gas contains oxygen and hydrogen, water is produced as a result of plasma reaction. The generated water and oligomer containing Si attach to the wafer surface that has been cooled. The attached liquid having fluidity flows into fine trench structures and holes in an early stage of the film forming process due to the effect of surface tension, and therefore a product having higher water content and higher fluidity generates and accumulates at the bottom of fine structures. Since any material of high water content become less dense when annealed, the aforementioned phenomenon leads to a lower film density at the bottom of fine structures.